**Small-signal and large-signal MOSFET channel resistance**

When running SPICE DC simulations one could often see two types of MOSFET transistor operating point parameters for the channel resistance printed by the simulator. These often have different names depending on model versions spanning a range: **ron, rout, rds, rd, 1/gds** – these are at first sight ambiguous and could be a source of confusion. Usually one of them is much bigger than the other. Here is actually what each of them represents.

**ron** - this is the large-signal MOSFET channel resistance. This parameter is derived by the partial derivative of the current operating point versus a point where Vds = 0 and Ids = 0.

Even if trivial, worth noting here that we calculate ron by:

$$r_{on} = \left[ \frac{\partial v_{ds}}{\partial i_{ds}} \right]_{V_{gs} = \text{const}} $$Thus, for convenience I provide here a plot where the red line shows the partial derivative of the chosen point at the I-V curve, with respect to a 0 volts 0 amps operating point – this is in fact what is referred as **ron**. It is sometimes called **large-signal resistance** and it is calculated through the slope of the line connecting (0,0) with (vds,ids).

**rout** - this is the small-signal MOSFET channel resistance. Usually when running fixed operating point simulations we are interested in the small-signal resistance for the specific operating point. It is computed through the tangent line at (vds,ids), here is an example plot:

Looked at it the other way rout is vds over ids for a single point.

$$r_{out} = \left[ \frac{v_{ds}}{i_{ds}} \right]_{V_{gs} = \text{const}} $$The small-signal output resistance is usually the one needed for evaluating impedances of current sources etc... It is worth noting that $1/g_{ds}$ is effectively equivalent to $r_{out}$ and represents the small-signal conductance of the device.

**Bricks and mortar of the internet**

An electrifying verbatim quote from a sociological report written specifically for the Prime Minister of Science in Australia: The State of Research in Australia: Brain Drain, University Research Funding and the Microelectronics Industry, authoured by Dr. Chris Nicol and published by Bell Labs.

Yep, big corporations are not what most people think they are.

**Harvesting gamma radiation**

*Can we harvest Earth's background gamma radiation and put it to good use? Here's my 2 ¢ on the topic.*

It's true that gamma rays can be converted to energy, just as visible light photons can by hitting a semiconductor junction with a bandgap similar to the energy of the same photons. However, as with most problems, in this one too, there is a trade off.

**Energy: **Gamma ray photons are significantly more energetic than visible light, which is at first sight good in the case of a harvesting application. The energy in a 1 MeV gamma ray photon is $1.6 \times 10^{-13}$J. Compared to visible light at e.g. 580 nm, a visible photon has $E = \frac{hc}{\lambda} = 342^{-21}$J. That's a difference of a few orders of magnitude and so a 1 MeV gamma photon is about 467000 times more energetic than a 580 nm (red) photon.

**Interaction: **Here comes a catch — the matter interaction probability of gamma rays is much much lower compared to visible light photons in the general case. Gamma rays primariliy interact with atomic electrons, therefore their matter interaction mostly depends on the electron density in the sensing material (there are of course other interaction mechanisms such as compton, or pair production which I exclude for simplicity). The ratio between the electron density to the bulk material density for various elements is usually constant and follows: $P = Z . \rho/A$; $Z$ is the element number, $\rho$ is the mass density and $A$ is the atomic mass. For most useful purposes, the most convenient way to harvest gamma rays is through integration with some form of semiconducting material. All useful semiconducting materials are of low Z (e.g. Ge, Si, Ga, B, etc..). There are some heavy element based devices out there, but those are expensive and relatively difficult to produce.

Compared to low-energy gamma rays or visible light, at this stage there are electronic devices offering quantum efficiency in the orders of 80-90 %. The same can not be said about high-energy gamma rays. Beyond 100 keV the QE of silicon drops dramatically to orders of < 1%.

**Earth's gamma background: **But even so, perhaps we should start optimistically by looking into Earth's natural gamma background and see how much energy there is, here's a plot taken recklessly from the study in [1].

The measurement is energy compensated and performed under a thick lead shielded detector, so I assume that the counts per second reflect the real particle activity due to the energy compensation and detector calibration. We can see that the background gamma follows some sort of a 1/f distribution. There is a distinct peak at 1461 keV which is due to the presence of Potassium 40.

For simplicity we can divide the graph into a few sections such that we can do a ballpark numerical integration.

Energy Range [keV] | Activity [cpm] |
Mid-energy range (for calculation) [keV] |
Photon energy [J] |
Total Energy [J/min] |
---|---|---|---|---|

0-500 | 75 | 250 | 40e-15 | 3e-12 |

500-1000 | 11 | 750 | 120e-15 | 1.32e-12 |

1000-1500 | 11 | 1250 | 200e-15 | 2.2e-12 |

1500-2000 | 3 | 1750 | 280e-15 | 840e-15 |

2000-2500 | 2 | 2250 | 360e-15 | 720e-15 |

2500-3000 | 1 | 2750 | 440e-15 | 440e-15 |

TOTAL | - | - | - | 8.52e-12 |

I know that this type of integration simplification is not accurate in its entirity but it gives a rough idea of the **collectable energy from background per minute** which happens to be **8.5 pJ/min**. This may be enough to support some wonderful creations of nature, such as the many Radiotrophic Fungi out there, but in the case of primitive electronics design, even with the most advanced processes that level of energy is by far not enough to cover leakage currents.

Okay, let's assume that we don't rely solely on the background radioactivity, but rather could use some form of safe (?) radioactive source, such as small quantities of Americium 241 — the same isotope used in smoke detectors.

Americium 241 is primarily an alpha emitter with helium particles in the energy range of about 5 MeV, it also emits gamma as it decays, but that's negligible and low-energy ~60 keV. The typical quentity available in smoke detector capsules is about 0.3 micrograms with an activity of about 37 kBq. Here's a picture of one such capsule I'm currently holding in my hands.

Let's assume that with a PIN diode we somehow could collect 5 MeV alpha particles with a quantum efficiency of about 1 %, which is a very bold statement for such high energy range. Knowing the activity, quantum efficiency and energy per particle we can estimate the energy accumulation per second.

$$ 37 \text{ kBq} = 37000 \text{ particles/second}\\ QE = 0.01\\ 37000 \times 0.01 = 370 \text{ collected particles/second}\\ 5 \text{ MeV} \approx 801.10^{-15} \text{ J/particle}\\ \text{Total Energy Rate} = 801.10^{-15} \times 370 = 296 \text{ pJ/second} $$An energy rate of 296 pJ/second is not a lot. Especially if you look at it from another perspective. You can divide the total collected particle rate per second by the amount of charge movement necessary to yield an Ampere. Even if you take the all particles, that still brings 12 pA. It may be enough to trigger the Darlington device in a smoke detector, but won't be quite enough to suit power applications.

Finally, to summarize — harvesting background gamma may sound like a crazy idea, but I don't think it's impossible. Especially in environments where that high energy ionizing radiation is abundant i.e. understand space. Here on earth, I think the use of some stronger isotopes would definitely make it possible to harvest with a PIN diode, but there are perhaps more efficient methods which have already been well explored.

**Dominant gate capacitance of a MOSFET**

These are simple concepts, which anyhow managed to play a trick on me while doing some SPICE simulations recently, so I decided to give a stress to this basic solid-state device model:

The complexity of MOSFET RC parasitics modelling can get extended to unprecedented levels, but when it comes to estimating the *gate* capacitance there is one node which is dominant. Unsurprisingly that's the capacitance associated with the polysilicon gate and the channel underneath which forms a kind of a parallel plate capacitor, it is usually denoted as **CG**. Let's revise some basic concepts, starting with the high-school physics relation for the capacitance of a parallel-plate voltage capacitor, where *A* is the plate area, and *d* is the distance between the plates:
$$C = \epsilon_{0}\epsilon_{n}\frac{A}{d}$$

This basic concept remains the same in MOSCAPs, except that the electrodes and their distance is modelled in a more unusual way. Now there are many other parasitics, such as the gate-source or gate-drain overlap capacitances, but these are usually orders of magnitude smaller than **CG**, and thus can typically be neglected in ballpark estimate calculations.

Here's a physical cross section view of a MOSFET, together with its **CG** plates.

The dominant gate capacitance of is formed by the gate (top plate) and the charge carriers in the channel underneath, all sandwiched between the gate oxide SiO2. The top plate is electrically (conductively) fixed, while the equivalent bottom plate appears as if it is floating. This is due to the variable space-charge distribution under the channel. This modulates the effective distance between the two plates with varying gate-bulk potential. The charge density in the semiconductor underneath the gate usually follows the following function (as seen on the surface).

When the **dominant charge carriers**, as for example **holes** in a **p-type** semiconductor, have migrated under the channel with a high density, due to the applied electric field, the device is operated in **accumulation**. On the other hand, a strong reversal of the gate potential forces the **minority charge carriers** to drift underneath the gate and form an area with high **electron** density. This mode of operation is referred to as **inversion**. In a MOSFET device, both operating modes, when operated under sufficiently high electric fields, force the carriers to form a gradient in the channel, which has a fairly similar distance between the gate dielectric. However, when the MOSFET is operated under weak inversion, the space-charge density forming the bottom plate electrode is nonlinear, and this is the place where things start to become a bit complicated.

When the surface potential is close to zero, the concentration of both carriers remains in a somewhat diluted state, this is indicated under the depletion section in the figure. When the surface potential approaches to form a channel, a weak electron inversion layer is formed. Because of this, the bottom plate of the gate capacitor floats. This forms an additional capacitor in series with the gate oxide capacitor, which varies greatly with the electrostatic potential. Quantitatively speaking the dependence of **CG** as a function of the electrostatic potential in a MOSFET behaves as shown in the classic diagram below.

The diagram has similarities with the space-charge density diagram and shows a capacitance versus gate voltage of a p-type MOSFET. Three operation modes can be identified.

**CV CHARACTERISTICS: ACCUMULATION**

When the gate voltage (relative to the bulk in a p-sub device) is negative, the channel is in accumulation. Per rule of thumb, the capacitance in accumulation approaches the one of Cox when the gate voltage is more negative than the so called flatband voltage. Vfb is a potential when there is no charge present on the oxide, or the oxide-semiconductor interface. In the case of weak accumulation the gate capacitance follows the relation

$$\frac{1}{C_{g}} = \frac{1}{C_{ox}}\bigg(1 + \frac{2kT/q}{V_{g} - V_{fb}}\bigg)$$Since 2kT/q is 0.052 V, Cg quickly approaches Cox at gate bias of lesser than -0.5 V.

**CV CHARACTERISTICS: DEPLETION**

When the gate bias is slightly higher than Vfb, in the case of a p-type substrate, the channel surface starts to get depleted of holes. The effective bottom plate of the MOS thus spreads out to the inner section of the substrate, this has an effect of increasing the equivalent plate-to-plate distance. As a result the Cg exhibits a decrease. The effective series capacitance caused by channel surface depletion can be approximated as

$$ C_{d} = \frac{\epsilon_{si}}{d_{dep}} $$where $d_{dep}$ is the equivalent depletion width and $\epsilon_{si}$ is the effective dielectric permittivity of the depleted region. Unfortunately its calculation is rather involving and is not particularly practical in ballpark designs. The total gate capacitance in the case of a depleted channel surface can be approximated to

$$C_{g} = \frac{C_{ox}}{\sqrt{1 + (2C_{ox}^{2}(V_{g}-V_{fb}/\epsilon_{si}qN_{a}))}}$$where $N_{a}$ is the acceptor concentration of the bulk silicon, and $\epsilon_{si}$ is the effective dielectric permittivity of the depletion region. It should be noted that this expression is an approximation and describes the gate capacitance in very weak inversion. This is also the point where Cg is of lowest magnitude.

**CV CHARACTERISTICS: INVERSION**

When the gate voltage increases further, typically around and above Vth, the gate capacitance stops decreasing as the depletion region slowly vanishes. Instead an inversion layer is formed, which in the case of a p-type semiconductor is comprised of electrons diffusing up the gate electrode. In effect, the bottom plate (formed by the electron channel) moves closer to the top polysilicon gate, which increases the gate capacitance. In very strong inversion Cg approaches that of Cox. Not surprisingly, the gate capacitance in strong inversion is also given by the relation expressed for accumulation. Repeated here for convenience

$$\frac{1}{C_{g}} = \frac{1}{C_{ox}}\bigg(1 + \frac{2kT/q}{V_{g} - V_{fb}}\bigg)$$The above relations however, are typically valid for the case of low-frequency DC signals. High frequency signals experience a different equivalent gate capacitance. This is due to the varying depletion capacitance, which is due to the limiter charge carrier mobility and their diffusion inertia.

Finally, this is just a top-of-the-line basics, more in-depth theory can be found in the excellent book: Solid-State-Electronic-Devices (6th edition), by Ben Streetman and Sanjay Banerjee. Also, Modern VLSI devices, by Yuan Taur and Tak Ning is also a very good resource.