^{-}▲ about & FAQ

**A 10 um rock flips the cart**

I recently stumbled upon a wikipedia article about Rendition – a Silicon valley based company which flourished straight after its foundation but unfortunately existed only a few years before going downhill. What draws attention is the vigorous inverse of the company's growth which was triggered by a few transistors positioned at the wrong place and the wrong time. Let's have a look at an excerpt from the Wikipedia article – this paragraph was most likely edited by an insider as of the high level of detail.

From Wikipedia:

*Rendition was one step behind other competitors coming to market at a pivotal time in the 3D PC graphics engines battle. The NVIDIA RIVA 128 came to market in late 1997. The V2100 saw first silicon in early 1997, but was late to sample due to a digital cell library bug necessitating a respin. Rendition used the libraries developed by SiArch (licensed through Synopsys at that time) for their digital logic synthesis. A critical section of circuitry happened to synthesize into a 3 input nor-gate driving a scanned flip-flop. Apparently this combination was never spiced (an accurate circuit simulation engine) by SiArch. The scan-flop had three passive transmission gate muxes driven by the three n-type transistors in the NOR3, all in series. The result of this was excessive resistance with a weak bus-hold cell, which ate into the allowable noise margin and violated the static discipline in good digital logic design. This manifests itself as an intermittent bug that is seen in the lab but not in high level behavioral or even RTL or gate-level simulations. This root cause was only determined after months of investigation, simulations, and test case development in the lab, which narrowed the problem to a very confined space. At that point, the chip was run live under a scanning electron microscope using the oscilloscope probe mode to find the problem net between the NOR3 gate and the scan-flop. The combination was then spiced and confirmed to be the culprit. Two full quarters were lost due to this bug. Despite these delays, the V2x00 shipped with fully conformant OpenGL and D3D drivers.*

In conclusion: even a 10 um rock could flip the cart.

**Column-parallel comparator noise correlation analysis**

When dealing with column-parallel comparators in Single-Slope (and other) ADCs, where there are a ton of other noise contributors, it may not be so obvious how you can measure the contribution of the comparator itself externally. This post shows a quick noise correlation analysis to estimate comparator noise contribution in the signal chain, which is applied to column-parallel Single-Slope (Ramp) ADCs, but not limited to this architecture. The idea can be expanded and reused in other ADC architectures and column-parallel chains, where we can assume high correlation between other noise sources e.g. references, clocks, bias voltages etc...

In order to evaluate the noise performance of column comparators an adjacent noise cross-correlation analysis technique can be applied. Let's have a look at a principle noise path diagram which will be used as a reference further in text.

*Noise path assumption diagram: adjacent column noise sources and their correlation (reference used further in text)*

$R_{i}$ represents the noise sample contributed by the shared ramp reference, which is common for both columns. The same applies to $K_{i}$ which represents the noise induced by random clock jitter and counter fluctuations. The noise samples from two adjacent columns $C_{1_{i}}$ and $C_{2_{i}}$ represent the thermal noise induced by the comparator. Therefore, for this analysis it has been assumed that the correlation $\rho$ for $R_{i}$ and $K_{i}$ for both column data $D_{1_{i}}$ and $D_{2_{i}}$ equals 1, and that the thermal noise from $C_{1_{i}}$ and $C_{2_{i}}$ between adjacent comparators has a correlation coefficient of $\rho = 0$, or:

$$\overbrace{R_{i}}^{\rho = 1} + \overbrace{C_{1_{i}}}^{\rho = 0} + \overbrace{K_{i}}^{\rho = 1} = D_{1_{I}} \\ \underbrace{R_{i}} + \underbrace{C_{2_{i}}} + \underbrace{K_{i}} = D_{2_{I}}$$By knowing the output samples for a converted static DC signal of adjacent columns we can compute the comparator noise statistically using subtraction of the random variables (statistically equivalent also to addition). To calculate the noise standard deviation of the comparator we must first compute the total mean $\mu$ of the adjacent column samples:

$$\mu = \dfrac{ \dfrac{\displaystyle\sum_{i=1}^{N} D_{1_{i}}}{N} + \dfrac{\displaystyle\sum_{i=1}^{N} D_{2_{i}}}{N}}{2}$$where $D_{1_{i}}$ and $D_{2_{i}}$ are the data samples at the output of the ADC. Assuming full correlation $\rho_{R} = \rho_{K} = 1$ and zero correlation for $\rho_{C_{1}} = \rho_{C_{2}} = 0$ we can write the comparator standard deviation as:

$$\sigma_{comp} = \dfrac{ \sqrt{ \dfrac{\displaystyle\sum_{i=1}^{N} \Big((D_{1_{i}} - D_{2_{i}}) - \mu \Big)^{2} }{N-1} } }{2}$$One may note that it has also been assumed that the thermal noise contribution of both comparators is identical, thus based on the summation rules of probabilities the noise magnitude should be halved in order to obtain the thermal noise contribution of a single comparator, hence the used denominator.

*Column noise contribution: comparator only*

*Column noise contribution: total column*

The figures above show output data measured on a real implementation (disregard the gaussian nonuniformity - it is due to some ADC DNL glitches) computed using the described method. The first figure shows the calculated comparator noise being of 1/3 lower magnitude as compared to the total output column noise which is shown in the second figure. The difference is assumed to be contributed by clock jitter, sampling thermal noise and ramp random walk noise. The measured comparator noise stdev in this measurement case equates to about 330 µV, which matches very well with transient noise simulations performed on the comparator earlier on.

In conclusion: this method is not limited to only column-parallel ADCs and/or single-slope data converters. It is the principle that matters and it can be applied to various other cases.

**The semiconductor industry in Bulgaria**

Recently I got inspired by a report about the semiconductor industry in the UK, and thought that it might be cool to copy some of their chart ideas and create a family tree about the semiconductor industry in Bulgaria.

Bulgaria can not boast with a large IC community, but actually, we have had quite a few successful, and not so successful IC ventures during the past 30 years. It all began during the 70s with the establishment of the Institute of Microelectronics and the semiconductor fabs around Botevgrad which used to produce discrete Ge and Si active devices. Later on during the 70s and 80s the fab produced MOS logic ICs of the 4000 and 7400 series, and also successfully copied and manufactured the IBM 6502 under the name CM630. This 8-bit processor was used in most of the early bulgarian personal computers - Pravetz.

After the fall of communism in 1989, the institute could not keep up innovating (if it ever has...) which led to its closure. Consequently most of the skilled resources emigrated, while a few remained to form a branch of Silway semiconductor (at that time a French fab). Later during the 90s there have been quite a few movements and acquisitions, making an average acquisition re-organization time of about 5-6 years.

Here is a graph chart of what I have managed to find out by talking to people and exploring the world of the internet:

*Family tree of semiconductor companies in Bulgaria*

Please, if you know more on the topic let me know in the comments, so I can update the chart. I am sure there is some missing information there.

**1 year Transistorized**

Yup, that's right! Today marks a year since I moved to this domain. Now this is calling for some stats to the rescue. Since June 2016 I wrote 23 posts, which compared to 2015 is exactly 50 % less. I hope this trend does not end up following Zeno's paradox, but hopefully 2016 would just be archived as a local minimum. The majority of these posts are an offspring of travels, hence the quality... and perhaps quantity in 2016.

Anyway, let me share something. The name of this domain (which I still think isn't sparkling of uttermost cleverness) was inspired by a word printed on the first ever very high volume mass-produced portable transistor radio, which pretty much revolutionized the way we receive information. This was the TR-55, behold:

*The first very high volume mass-produced transistor radio - TR-55*

See? - it's T R A N S I S T O R I Z E D :)

Btw, I am now partly working on my final "long" paper, and pretty much write circuit related stories all day every day. So yes, catch you in my next post which might again be a philosophical one... just releasing the steam with philosophy doctrines here...