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When dealing with column-parallel comparators in Single-Slope (and other) ADCs, where there are a ton of other noise contributors, it may not be so obvious how you can measure the contribution of the comparator itself externally. This post shows a quick noise correlation analysis to estimate comparator noise contribution in the signal chain, which is applied to column-parallel Single-Slope (Ramp) ADCs, but not limited to this architecture. The idea can be expanded and reused in other ADC architectures and column-parallel chains, where we can assume high correlation between other noise sources e.g. references, clocks, bias voltages etc...
In order to evaluate the noise performance of column comparators an adjacent noise cross-correlation analysis technique can be applied. Let's have a look at a principle noise path diagram which will be used as a reference further in text.
$R_{i}$ represents the noise sample contributed by the shared ramp reference, which is common for both columns. The same applies to $K_{i}$ which represents the noise induced by random clock jitter and counter fluctuations. The noise samples from two adjacent columns $C_{1_{i}}$ and $C_{2_{i}}$ represent the thermal noise induced by the comparator. Therefore, for this analysis it has been assumed that the correlation $\rho$ for $R_{i}$ and $K_{i}$ for both column data $D_{1_{i}}$ and $D_{2_{i}}$ equals 1, and that the thermal noise from $C_{1_{i}}$ and $C_{2_{i}}$ between adjacent comparators has a correlation coefficient of $\rho = 0$, or:
$$\overbrace{R_{i}}^{\rho = 1} + \overbrace{C_{1_{i}}}^{\rho = 0} + \overbrace{K_{i}}^{\rho = 1} = D_{1_{I}} \\ \underbrace{R_{i}} + \underbrace{C_{2_{i}}} + \underbrace{K_{i}} = D_{2_{I}}$$By knowing the output samples for a converted static DC signal of adjacent columns we can compute the comparator noise statistically using subtraction of the random variables (statistically equivalent also to addition). To calculate the noise standard deviation of the comparator we must first compute the total mean $\mu$ of the adjacent column samples:
$$\mu = \dfrac{ \dfrac{\displaystyle\sum_{i=1}^{N} D_{1_{i}}}{N} + \dfrac{\displaystyle\sum_{i=1}^{N} D_{2_{i}}}{N}}{2}$$where $D_{1_{i}}$ and $D_{2_{i}}$ are the data samples at the output of the ADC. Assuming full correlation $\rho_{R} = \rho_{K} = 1$ and zero correlation for $\rho_{C_{1}} = \rho_{C_{2}} = 0$ we can write the comparator standard deviation as:
$$\sigma_{comp} = \dfrac{ \sqrt{ \dfrac{\displaystyle\sum_{i=1}^{N} \Big((D_{1_{i}} - D_{2_{i}}) - \mu \Big)^{2} }{N-1} } }{2}$$One may note that it has also been assumed that the thermal noise contribution of both comparators is identical, thus based on the summation rules of probabilities the noise magnitude should be halved in order to obtain the thermal noise contribution of a single comparator, hence the used denominator.
The figures above show output data measured on a real implementation (disregard the gaussian nonuniformity - it is due to some ADC DNL glitches) computed using the described method. The first figure shows the calculated comparator noise being of 1/3 lower magnitude as compared to the total output column noise which is shown in the second figure. The difference is assumed to be contributed by clock jitter, sampling thermal noise and ramp random walk noise. The measured comparator noise stdev in this measurement case equates to about 330 µV, which matches very well with transient noise simulations performed on the comparator earlier on.
In conclusion: this method is not limited to only column-parallel ADCs and/or single-slope data converters. It is the principle that matters and it can be applied to various other cases.
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