**Applied random walks**

Wiener processes and the integration of white noise during the voltage slewing process of a current integrated into a capacitor are something which I have been playing around for some time now. Here is one example showing us why hand calculations using wide sense stationary noise source assumptions are not always accurate. The AC noise analysis is a good methodology for noise contributor estimation, however, in some cases it gives us a fake noise picture and this is where transient noise analysis comes handy. Here I just want to show an example of how white noise accumulates during a capacitor charge in the time-domain. Imagine a noisy current source discharging an initially charged capacitor to a certain value:

*An equivalent noisy current source discharging a capacitor. Noisy, because the transistor's SPICE models contain noise models.*

The ideal switch charging the cap is controlled via a pulsed source, while the current mirror is constantly sinking current at a fixed rate. If we run multiple transient noise runs of the above schematic we may discover that the actual ramp slew rate looks more smething like this:

*Beginning of random walk on a noisy ramp voltage.*

*Zoom into the ramp voltage transient noise runs.*

The latter process comes from the fact that the power spectral density (PSD) of the noisy transistor is uniform in both left and right of the zero axes and that the voltage fluctuations accumulate in time. This process in statistics in known as a Wiener or Random walk process. It is a well studied phenomenon which is also widely used in stock market analysis and prediction. The difference here is that it is applied as a noise integration on a capacitor.

The main characteristics of interest in our case, for a generalized Wiener process are the variance and standard deviation with time. As the used PSD is uniform, the generalized Wiener process has:

mean value of zero: $z(t) - z(0) = 0$

variance of: $z(t) - z(0) = t$

and standard deviation of: $z(t) - z(0) = \sqrt{t}$

It is exactly the standard deviation that is of most interest for us. It implies that the longer we ramp, the quadratically the standard deviation increases, eventually reaching infinity. To verify this experimentally, I made a test case using external components.

*Discrete 22uF capacitor with reset transistor in parallel, and a noise current switch.*

When we deal with exteranl components it is often hard to measure noise levels in the order of microvolts due to a number of interference factors. Instead, I decided to use an integration capacitor of 22uF and large artificially induced noise current. The latter was injected by controlling a switched current source using a white noise source. Here is the whole setup:

*Two inidividual current sources for ramp slew and current noise injection. The latter controlled by individual white and pulse voltage sources. (excuses for the pointless angle)*

After a day of experiments with the sampling rate, mean currents, external interference debug etc. I finally managed to capture the effect and I've made a combined gif animation. Here is is:

*Cumulative animation of the Wiener process with different ramp mean values.*

The animated gif file shows 15 measurements with mean integration current swept from 60 to 200uA and a static additive white noise of 2uA (ramp of first frame has no added noise). I used a rather large integration capacitor (22u) and this is the reason why I had to boost the added current noise level to such a high value. Also note that the ramp time is about 300ms. The screenshots show a cumulative x8 curves plotted on top. There might be some additional aliasing artifacts due to the low sample rate (scope runs out of memory for higher sampling rates at this huge period of 300ms) however, I did some measurements with an analog scope and by looking at the phosphor memory I could confirm that the random walk is indeed random and chaotic.

*Ramp measured using an analog scope, some chaotic behaviour is observed in the phosphor memory.*

The ramp non-linearity at the high voltage end is caused by the PNP BJTs I used for capacitor reset and the switchable current source. There are some second order effects in this test, however, I think it kind-of gives an informal representation of the process. Stay tuned for more during the next couple of weeks.