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Introductory reading on SAR ADCs

I have been honoured to be the thesis supervisor of one of our brightest fourth year students, who did an excellent job helping me out with some pad and ESD protection designs last summer. He will be working on column-parallel ADCs, thus, I've decided to put-up a quick introductory summer reading list on SAR ADCs.

One might say that we are flooded with information nowadays for which he may totally be right, however, the field of VLSI design is still kept in secrecy and large data converter systems are often considered a mystery by newcomers. What's most important with introductory books in nieche fields is that they keep the details out of band, but yet try to maintain a colorful backbone such that the reader doesn't get bored. Because nieche field literature is ususally developed by narrow-field specialists, it isn't rare that we see papers unsuitable for undergraduate education. In fact, the greatest knowledge gap in university education is between the under - post graduate studies, hence, to make the climbing slope milder here are my suggestions for the area of image sensor converters.

Perhaps one should start by having a look at Walt Kester's introductory notes on Successive Approximation ADCs - ADC Architectures II: Successive Approximation ADCs.

After examining the fundamentals, I would head the list with a 200+ page PhD thesis by Albert Chang from MIT on "Low-Power High-Performance SAR ADC with Redundancy and Digital Background Calibration". Albert offers excellent introductory chapters (A! LOT!) on the successive approximation algorithm and the digital arithmetic, all of which is presented under the light of actual transistor-level schematics.

One of the earliest reported column-parallel SAR ADCs used in an image sensor lies in Eric Fossum group's paper entitled: "CMOS Active Pixel Sensor with On-Chip Successive Approximation Analog-To-Digital Converter" published in the Journal of Electron Devices, Oct 1997. This paper shall provide you with an insight on actual implementation details and the specifics of the column-parallel capacitor layout of the bridge capacitor DACs.

A more modern and representative paper is: "Low-Power CMOS Image Sensor Based on Column-Parallel Single-Slope/SAR Quantization Scheme" by Tang et al. where they offer a clasisc two-step data conversion using a single-slope for the fist 3 MSBs and an 8-bit SAR scheme for the LSBs respectively.

The reading matetial on this line may be too advanced for a thesis reading, but I am listing it here, as it offers an elegant scheme coping with physical process defects and capacitor mismatch. A Low-Power Pilot-DAC Based Column Parallel 8b SAR ADC With Forward Error Correction for CMOS Image Sensors by Denis Chen from SSIS.

A few extra reading (which you may want to actually start with first) is an application note by Texas Instruments on Understanding Data Converters. There's tons of information on data converter fundamentals online, but I also find these notes from Boris Murmann from Stanford to be very clean: VLSI Data Conversion Circuits. And finally, a nice book edited by some of my friends from Linköping: CMOS Data Converters for Communications by Gustavsson, Mikael, Wikner, J. Jacob, Nianxiong Tan.

There might be more and even better introductory reading material, however, I am sure the provided above would source you with plenty of references, and if you have any suggesstions for more interactive literature don't be shy to use the comments so I can add it up.

Date:Sun Jun 13 14:33:27 CET 2016

Comments

Deyan
20 Jul 2016, 21:39
Adding one more to the list:

C. P. Huang, H. W. Ting and S. J. Chang, "Analysis of Nonideal Behaviors Based on INL/DNL Plots for SAR ADCs," in IEEE Transactions on Instrumentation and Measurement, vol. 65, no. 8, pp. 1804-1817, Aug. 2016.

http://dx.doi.org/10.1109/TIM.2016.2562198
Deyan
22 Jul 2016, 14:28
Adding also the original paper for weighted CDACs from JSSC 1979.

Y. S. Yee, L. M. Terman and L. G. Heller, "A two-stage weighted capacitor network for D/A-A/D conversion," in IEEE Journal of Solid-State Circuits, vol. 14, no. 4, pp. 778-781, Aug. 1979.

http://dx.doi.org/10.1109/JSSC.1979.1051264
Deyan
31 Aug 2016, 18:28
Another good Friday fundamentals paper:

J. L. McCreary and P. R. Gray, "All-MOS charge redistribution analog-to-digital conversion techniques. I," in IEEE Journal of Solid-State Circuits, vol. 10, no. 6, pp. 371-379, Dec. 1975.
doi: 10.1109/JSSC.1975.1050629

Also, check out Part II.
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